- Docente responsabile
- DAVIDE CONFICCONI
- CCS proponenti
- Ingegneria Informatica
- CFU
- 2
- N° max studenti
- 30
- Parole chiave:
- Accelerator Cards, Domain Specific Systems, Embedded SoCs, FPGAS
- Tag
- Aerospace, Computer science, Engineering, Software
Descrizione dell'iniziativa
Overview The course aims to introduce students to the field of adaptable, reconfigurable, and domain-specific systems based mainly on FPGAs, discussing the system architecture, the different design flows, and how to interact with them. To cope with the ever-growing innovation pace and performance demand, novel systems must adapt and specialize to a particular class of computations in a flexible and adaptable manner, even at the hardware level after manufacturing. Therefore, adaptive domain-specific computing systems are a unique opportunity to deliver energy-efficient computations that guarantee flexibility and performance as their ubiquity grows in many fields.The course encompasses a methodological approach to the three most important system-level topics: understanding the system design, the hardware/software co-design flow, and the hardware/software interaction. Based on that, the course aims to let students understand how to solve different HW/SW co-design trade-offs at a different level: low-level EDA with Vivado and RTL, IP/component design with Vitis HLS, System on Chip (SoC) and PYNQ-based interaction, Accelerator Cards for Datacenter, and the novel AI Engine technology in the context of Versal and Ryzen AI heterogeneous systems with Riallto. At the end of the course, students must carry on a teaching-like project to complete their course, agreed with the teacher.
Periodo di svolgimento
dal March 2025 a May 2025
Calendario
Intro, FPGA tech, design flows, 17 March, NECSTLab Meeting Room, Ed. 20, minus 1 floor
Vivado and the Led Example, 24 March, NECSTLab Meeting Room, Ed. 20, minus 1 floor
HLS: Datapath and control, 26 March, NECSTLab Meeting Room, Ed. 20, minus 1 floor
PYNQ and interfaces 28 March, NECSTLab Meeting Room, Ed. 20, minus 1 floor
Full system example on SoCs, 31 March, NECSTLab Meeting Room, Ed. 20, minus 1 floor
Datacenter cards and Vitis theory 2 April, , NECSTLab Meeting Room, Ed. 20, minus 1 floor
Versal Systems and Vitis Practice 4 April, , NECSTLab Meeting Room, Ed. 20, minus 1 floor
Ryzen AI and specialized NPUs 11 April, , NECSTLab Meeting Room, Ed. 20, minus 1 floor
Vitis AI for FPGAs at the Edge 14 April, , NECSTLab Meeting Room, Ed. 20, minus 1 floor
Open Discussion 16 April, NECSTLab Meeting Room, Ed. 20, minus 1 floor
Q&A [ON DEMAND] 23 May, To be announced